What Is SPI? Working Principles and Differences from I2C
This article details how SPI works, the roles of its four signal lines, and how to configure its clock modes for engineers. It also compares SPI and I2C in terms of speed, wiring, and applications, and provides a detailed explanation of its application to non-volatile memory design, including FeRAM (ferroelectric memory).
What Is SPI? Basic Concepts and Background
SPI (Serial Peripheral Interface) is a widely used synchronous serial communication standard for connecting microcontrollers to peripheral devices. In embedded system design, it is broadly adopted as the interface for sensors, memory devices, and display drivers. Owing to its high speed and ease of implementation, it has become an essential standard interface in modern embedded system design.
SPI’s Formal Name and Development History
SPI is an abbreviation for “Serial Peripheral Interface,” a serial bus standard developed in the 1980s by Motorola (now NXP Semiconductors). At the time, parallel buses were used for connecting peripheral devices in embedded systems, but posed challenges of excessive wiring and increase in board surface. Therefore, Motorola proposed SPI, which enabled high-speed synchronous communication with fewer signal lines. Subsequently, many semiconductor manufacturers commercialized compatible devices, and it became a widespread industry standard. Derivatives such as QSPI (Quad SPI) for higher throughput are now widely used, and SPI flash memories are ubiquitous.
Characteristics of Systems Using SPI
SPI is a standard primarily designed for inter-chip communication on a circuit board, i.e., short-distance communication of a few centimeters to tens of centimeters. Therefore, it is used to connect microcontrollers with various peripheral devices such as sensors, A/D converters, non-volatile memory (flash, FeRAM, etc.), and LCD drivers. Common characteristics of SPI applications include the need for high-speed data transfer and short communication distances. Furthermore, its simple protocol results in low software overhead, making it well-suited for applications requiring real-time performance. There is no upper limit on communication speed; high-speed communication of tens of MHz or more is possible within the limits of device specifications and signal integrity in the board design.
The Roles of SPI’s Four Signal Lines
A standard SPI connection consists of four signal lines: SCK, MOSI, MISO, and SS. SCK is the clock signal generated by the master, which synchronizes data transfer. MOSI is the data transmission line from the master to the slave, while MISO is the data transmission line from the slave to the master. The SS (Slave Select) signal is used to select the target slave device and is active-low. These four signal lines enable full-duplex communication, allowing data to be transmitted and received simultaneously between the master and the slave. In recent years, there has been a move toward more inclusive terminology, with MOSI and MISO sometimes referred to as COPI and CIPO. As a result, the signal names used may vary depending on the datasheet.
SPI Communication Mechanism and Clock Modes
SPI communication uses a straightforward mechanism in which the master generates the clock, and data is transmitted and received in synchronization with that clock. Because SPI is not defined by a strict industry standard, it is important to carefully interpret the datasheet for the connected device and correctly configure parameters such as the clock mode and data word length to ensure proper communication.
Master-Slave Configuration and Data Transfer Flow
SPI communication is based on a division of roles between a master that controls communication and a slave that operates according to instructions. The master always holds the initiative in communication, and slaves cannot initiate transfers on their own. The data transfer flow begins with the master setting the SS signal low to select the slave device to communicate with.Then, the master outputs a clock signal to SCK, and transmits data from the MOSI line in synchronization with that clock.Contemporaneously, the slave sends data back through the MISO line. Because MOSI and MISO are independent, full-duplex communication is possible, enabling high throughput. After communication is complete, the master the SS signal to high to terminate the transaction.
Slave Selection Using the Chip Select Signal
When multiple slave devices are connected to a single master, SPI uses the SS signal, also known as the CS (Chip Select) signal, to select the target slave device. While the SCK, MOSI, and MISO lines are shared among all slave devices, a separate SS line is required for each slave. The master drives only the SS signal of the target slave low while keeping the SS signals of all other slaves high, allowing communication only with the selected slave. Unlike I2C, which uses address-based selection, SPI directly selects the target slave using a dedicated hardware signal. This minimizes protocol overhead while maintaining high-speed communication. However, because an additional SS signal line is required for each slave device, the number of available GPIO pins on the master must be taken into account when connecting a large number of slaves.
The Four Operating Modes Defined by CPOL and CPHA—and How to Configure Them
In SPI communication, four operating modes, from Mode 0 to Mode 3, are defined by the combination of CPOL (which indicates the polarity of the clock) and CPHA (which indicates the phase of the clock). A CPOL of 0 corresponds to an idle-low clock, 1 to idle-high. CPHA defines the data sampling timing, and the mode used is determined by the specifications of the slave device. The master side must check the slave’s datasheet and set the matching mode. Inconsistent mode settings can cause communication errors such as bit misalignment and data corruption, making this a crucial point to check during design steps.
Differences Between SPI and I2C: Points to Consider Based on Speed, Wiring, and Application
I2C is frequently considered alongside SPI in embedded system design. Both are synchronous serial communication standards, but there are important differences that affect design decisions, such as the number of signal lines, communication speed, and connection method.
Differences in the Number of Signal Lines and Connection Method
SPI uses four signal lines as standard, while I2C communicates using only two lines: SCL (clock) and SDA (data). I2C employs an open-drain method, requiring pull-up resistors, but enabling multi-master configurations where multiple masters are connected on the same bus. On the other hand, with SPI, the number of SS signal lines increases with each additional slave, sothe increase in pin count should be carefully considered when connecting many devices. However, SPI uses push-pull output (active drive), eliminating the need for external pull-up resistors and providing cleaner, more stable signal edges. The basic decision-making criteria are: I2C if prioritizing fewer wires, and SPI if prioritizing high speed and design simplicity.
Comparison of Communication Speed and Throughput
SPI significantly surpasses I2C in communication speed. I2C’s Standard-mode is 100 kbps, its Fast-mode is a maximum of 400 kbps, and even the faster “Fast-mode Plus” is limited to 1 Mbps. On the other hand, SPI has no speed limit specified in the standard, and clock rates of tens of MHz or higher can be achieved depending on the devices used and the circuit design. Furthermore, SPI supports full-duplex communication, which is advantageous in terms of throughput as it can transmit and receive simultaneously. I2C is half-duplex communication and cannot transmit and receive at the same time. SPI fits the need of interfaces with FeRAM or flash memory that require reading and writing large amounts of data with low latency, when data is written frequently for example.
Distinguishing between SPI and I2C in Design: When to Choose each interface?
The choice between SPI and I2C depends on the system requirements. When high-speed data transfer is required, specifically for communication with ADCs/DACs, high-speed sensors, and non-volatile memory such as flash memory and FeRAM, SPI is well-suited. On the other hand, when many devices must be connected and there is a pin count or board space constraint, or when minimizing wiring outweighs speed, I2C is more advantageous. I2C is also often used for communication with devices that do not require high speed, such as temperature sensors and RTCs. In actual design, a mixed configuration is common practice: SPI for high-speed storage and displays, I2C for low-speed management and control devices.
Choosing Between SPI and I2C for System Design
SPI and I2C are communication standards, both with their own distinct characteristics and strengths. In applications that use non-volatile memory, selecting the appropriate interface can particurlarly affect overall system performance. Consequently, a thorough understanding of the differences between the two is essential.
Summary of SPI’s Characteristics and Strengths
SPI’s primary strengths are its high communication speed and high throughput enabled by full-duplex communication. It provides stable, clock-synchronized data transfer, and its low protocol overhead makes it well suited for systems requiring real-time performance. In addition, its push-pull signaling enables fast signal rise and fall times, resulting in excellent signal integrity during high-speed operation. The increased pin count required for SS signal lines should be recognized as a trade-off. In system design, correctly configuring the operating mode according to the device datasheet is a prerequisite for reliable communication.
Recap: SPI vs. I2C Selection Criteria
When summarizing the selection criteria for SPI and I2C, the four main factors are communication speed, number of wires, number of devices, and bidirectionality. If speed is the top priority, SPI is the best choice, but if space on the board or wiring constraints are strict, I2C is a more practical option. I2C is also worthwhile when a multi-master configuration is required. Conversely, if the main application is high-speed communication with one-to-one or a small number of slaves, adopting SPI simplifies the design.
FeRAM and SPI: Applications to Non-Volatile Memory Design
FeRAM (ferroelectric memory) has characteristics such as high-speed writes, low power consumption, and high write endurance compared to flash memory, and its adoption is progressing in industrial equipment and IoT devices. It supports the SPI interface in a wide range of product lineups, making it easy to connect to microcontrollers. When incorporating SPI-connected FeRAM into a design, it is important to check the datasheet for the maximum clock frequency and the procedure for issuing the Write Enable (WREN) required before writing. Combining SPI’s high-speed interface with FeRAM’s immediate no-erase writes enables highly reliable systems that safeguard data in the instant before power is lost.
RAMXEED FeRAM Product Lineup
